 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ON Semiconductort JFET Chopper Transistors N-Channel -- Depletion 3 GATE 1 DRAIN J111 J112 J113 MAXIMUM RATINGS Rating Drain-Gate Voltage Gate-Source Voltage Gate Current Total Device Dissipation @ TA = 25C Derate above 25C Lead Temperature Operating and Storage Junction Temperature Range Symbol VDG VGS IG PD TL TJ, Tstg Value -35 -35 50 350 2.8 300 2 SOURCE Unit Vdc Vdc mAdc mW mW/C C C 1 2 3 -65 to +150 CASE 29-11, STYLE 5 TO-92 (TO-226AA) ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Gate-Source Breakdown Voltage (IG = -1.0 Adc) Gate Reverse Current (VGS = -15 Vdc) Gate Source Cutoff Voltage (VDS = 5.0 Vdc, ID = 1.0 Adc) J111 J112 J113 ID(off) V(BR)GSS IGSS VGS(off) -3.0 -1.0 -0.5 -- -10 -5.0 -3.0 1.0 nAdc 35 -- -- -1.0 Vdc nAdc Vdc Drain-Cutoff Current (VDS = 5.0 Vdc, VGS = -10 Vdc) ON CHARACTERISTICS Zero-Gate-Voltage Drain Current(1) (VDS = 15 Vdc) IDSS J111 J112 J113 rDS(on) J111 J112 J113 Cdg(on) + Csg(on) Cdg(off) Csg(off) -- -- -- -- 30 50 100 28 pF 20 5.0 2.0 -- -- -- mAdc Static Drain-Source On Resistance (VDS = 0.1 Vdc) Drain Gate and Source Gate On-Capacitance (VDS = VGS = 0, f = 1.0 MHz) Drain Gate Off-Capacitance (VGS = -10 Vdc, f = 1.0 MHz) Source Gate Off-Capacitance (VGS = -10 Vdc, f = 1.0 MHz) 1. Pulse Width = 300 s, Duty Cycle = 3.0%. -- -- 5.0 5.0 pF pF (c) Semiconductor Components Industries, LLC, 2001 1 June, 2001 - Rev. 1 Publication Order Number: J111/D J111 J112 J113 TYPICAL SWITCHING CHARACTERISTICS 1000 t d(on), TURN-ON DELAY TIME (ns) 500 200 100 50 20 10 5.0 2.0 1.0 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 ID, DRAIN CURRENT (mA) 20 30 50 RK = 0 RK = RD J111 J112 J113 TJ = 25C VGS(off) = 12 V = 7.0 V = 5.0 V 1000 500 200 t r , RISE TIME (ns) 100 50 20 10 5.0 2.0 1.0 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 ID, DRAIN CURRENT (mA) 20 30 50 RK = 0 RK = RD J111 J112 J113 TJ = 25C VGS(off) = 12 V = 7.0 V = 5.0 V Figure 1. Turn-On Delay Time Figure 2. Rise Time 1000 t d(off) , TURN-OFF DELAY TIME (ns) 500 200 100 50 20 10 5.0 2.0 1.0 0.5 0.7 1.0 RK = 0 RK = RD TJ = 25C J111 J112 J113 VGS(off) = 12 V = 7.0 V = 5.0 V 1000 500 200 t f , FALL TIME (ns) 100 50 20 10 5.0 2.0 RK = 0 RK = RD TJ = 25C J111 J112 J113 VGS(off) = 12 V = 7.0 V = 5.0 V 2.0 3.0 5.0 7.0 10 ID, DRAIN CURRENT (mA) 20 30 50 1.0 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 ID, DRAIN CURRENT (mA) 20 30 50 Figure 3. Turn-Off Delay Time Figure 4. Fall Time +VDD RD SET VDS(off) = 10 V INPUT RGEN 50 50 VGEN RK RGG VGG RT OUTPUT 50 INPUT PULSE tr 0.25 ns tf 0.5 ns PULSE WIDTH = 2.0 s DUTY CYCLE 2.0% RGG & RK RD(RT ) 50) RD + RD ) RT ) 50 Figure 5. Switching Time Test Circuit NOTE 1 The switching characteristics shown above were measured using a test circuit similar to Figure 5. At the beginning of the switching interval, the gate voltage is at Gate Supply Voltage (-VGG). The Drain-Source Voltage (VDS) is slightly lower than Drain Supply Voltage (VDD) due to the voltage divider. Thus Reverse Transfer Capacitance (Crss) or Gate-Drain Capacitance (Cgd) is charged to VGG + VDS. During the turn-on interval, Gate-Source Capacitance (Cgs) discharges through the series combination of RGen and RK. Cgd must discharge to VDS(on) through RG and RK in series with the parallel combination of effective load impedance (RD) and Drain-Source Resistance (rds). During the turn-off, this charge flow is reversed. Predicting turn-on time is somewhat difficult as the channel resistance rds is a function of the gate-source voltage. While Cgs discharges, VGS approaches zero and rds decreases. Since Cgd discharges through rds, turn-on time is non-linear. During turn-off, the situation is reversed with rds increasing as Cgd charges. The above switching curves show two impedance conditions; 1) RK is equal to RD, which simulates the switching behavior of cascaded stages where the driving source impedance is normally the load impedance of the previous stage, and 2) RK = 0 (low impedance) the driving source impedance is that of the generator. http://onsemi.com 2 J111 J112 J113 y fs, FORWARD TRANSFER ADMITTANCE (mmhos 20 J112 J111 C, CAPACITANCE (pF) 10 7.0 5.0 Tchannel = 25C VDS = 15 V J113 10 7.0 5.0 Cgd Tchannel = 25C (Cds IS NEGLIGIBLE) Cgs 15 3.0 2.0 0.5 0.7 3.0 2.0 1.5 1.0 2.0 3.0 5.0 7.0 10 ID, DRAIN CURRENT (mA) 20 30 50 1.0 0.03 0.05 0.1 0.3 0.5 1.0 3.0 5.0 VR, REVERSE VOLTAGE (VOLTS) 10 30 Figure 6. Typical Forward Transfer Admittance Figure 7. Typical Capacitance 200 rds(on), DRAIN-SOURCE ON-STATE RESISTANCE (OHMS) rds(on), DRAIN-SOURCE ON-STATE RESISTANCE (NORMALIZED) IDSS = 10 160 mA 120 80 40 0 25 mA 50 mA 75 mA 100 mA 125 mA 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -70 -40 -10 20 50 80 110 Tchannel, CHANNEL TEMPERATURE (C) 140 170 ID = 1.0 mA VGS = 0 Tchannel = 25C 0 1.0 2.0 3.0 4.0 5.0 6.0 VGS, GATE-SOURCE VOLTAGE (VOLTS) 7.0 8.0 Figure 8. Effect of Gate-Source Voltage On Drain-Source Resistance Figure 9. Effect of Temperature On Drain-Source On-State Resistance 100 rds(on), DRAIN-SOURCE ON-STATE RESISTANCE (OHMS) 90 80 70 60 50 40 30 20 10 9.0 8.0 7.0 6.0 VGS(off) 5.0 4.0 3.0 2.0 1.0 rDS(on) @ VGS = 0 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 IDSS, ZERO-GATE-VOLTAGE DRAIN CURRENT (mA) Figure 10. Effect of IDSS On Drain-Source Resistance and Gate-Source Voltage http://onsemi.com 3 VGS, GATE-SOURCE VOLTAGE (VOLTS) Tchannel = 25C 10 NOTE 2 The Zero-Gate-Voltage Drain Current (IDSS), is the principle determinant of other J-FET characteristics. Figure 10 shows the relationship of Gate-Source Off Voltage (VGS(off) and Drain- Source On Resistance (rds(on)) to IDSS. Most of the devices will be within 10% of the values shown in Figure 10. This data will be useful in predicting the characteristic variations for a given part number. For example: Unknown rds(on) and VGS range for an J112 The electrical characteristics table indicates that an J112 has an IDSS range of 25 to 75 mA. Figure 10, shows rds(on) = 52 Ohms for IDSS = 25 mA and 30 Ohms for IDSS = 75 mA. The corresponding VGS values are 2.2 volts and 4.8 volts. J111 J112 J113 PACKAGE DIMENSIONS TO-92 (TO-226) CASE 29-11 ISSUE AL A R P L SEATING PLANE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- K XX G H V 1 D J C SECTION X-X N N DIM A B C D G H J K L N P R V Thermal Clad is a trademark of the Bergquist Company. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 4 J111/D |
Price & Availability of J111RLRP
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |